Register

Abstract

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• A group of Latch
• Accessible from Instruction

2 main purposes

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1. Storying values during computations (like Memory Address & value)
2. Configuring CPU

Register Type

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Instruction Register

• Contains Instruction retrieved from Main Memory

Control & Status Registers (CSRs)

• There are multiple such register
• Stores information about the current state of the processor or device
• CSRs are typically used to control various aspects of the processor’s operation, such as interrupt handling, memory management, and power management etc

Stack Pointer

• A Register
• Holds the address of the top of the Stack Segment in the current execution context

MIPS Registers

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Terminologies

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Register Width

• The number of Bit a Register can hold

Register File

• A collection of registers that CPU can quickly store and retrieve Data

Memory Mapped Register

• Register that is treated as a Main Memory location
• This means that the register can be accessed using the same Instruction and addressing modes as memory.
• Often used to control hardware devices, such as I/O devices (Like the UART in XV6) and memory controllers

// XV6-RISCV Kernel Codes, memlayout.h
 
// Physical memory layout
 
// qemu -machine virt is set up like this,
// based on qemu's hw/riscv/virt.c:
//
// 00001000 -- boot ROM, provided by qemu
// 02000000 -- CLINT
// 0C000000 -- PLIC
// 10000000 -- uart0 
// 10001000 -- virtio disk 
// 80000000 -- boot ROM jumps here in machine mode
//             -kernel loads the kernel here
// unused RAM after 80000000.
 
// the kernel uses physical memory thus:
// 80000000 -- entry.S, then kernel text and data
// end -- start of kernel page allocation area
// PHYSTOP -- end RAM used by the kernel
 
// qemu puts UART registers here in physical memory.
#define UART0 0x10000000L
#define UART0_IRQ 10